In the system chip SoC test optimization, test power and test time are the two test target, they exist interaction relations. In the process of multiobjective optimization, evolutionary algorithm for solving multiobjective optimization problem has good effect, so various evolutionary algorithms are widely used in SoC test in the study of multiobjective optimization. In the absence of SoC test time or test power consumption as the constraint conditions under the premise of the SoC test time and test power joint optimization model of the these two goals. And the improved Strength Pareto Evolutionary Algorithm (SPEAII) is studied, which will SPEAII Algorithm used for the solution of the model established. Use the ITC’02 standard p93791 circuit and d695 in the circuit of the above methods to experimental verification, the results show that the method can equilibrium solution is provided for the established joint optimization model. And in view of the p93791 circuit, in the experimental data with the NSGAII algorithm comparison, better optimization results were obtained. To prove to SPEAII SoC test architecture optimization has good applicability and effectiveness.