基于FPGA的CMOS成像电路设计
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中国科学院长春光学精密机械与物理研究所中国科学院航空光学成像与测量重点实验室长春130033

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TP752.1TN27

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国家林业公益性资助项目(201204515)资助


Design of CMOS imaging circuit based on FPGA
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Key Laboratory of Airborne Optical Imaging and Measurement, Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, Changchun 130033, China

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    摘要:

    为满足科研和工业领域中对于高分辨率工业相机的需求,针对大靶面CMOS探测器CMV20000设计了成像电路。介绍了CMV20000探测器芯片的主要功能特点,利用FPGA实现了探测器控制信号的驱动和高速LVDS串行图像数据的接收。采用动态相位调整技术校正16路LVDS高速串行数据的相位差、实现了图像数据的同步接收、高速串并转换,对接收到的图像进行了重构并将其通过CameraLink接口进行输出。利用测试图像对成像系统进行了功能验证,并对实际景物进行了成像试验,试验结果表明,系统输出帧频最高达30 fps,图像信噪比约为35 dB,系统成像质量满足指标需求。

    Abstract:

    In order to satisfy the requests of industrial camera with high resolution in national defense and industry, imaging circuit is designed for the large target CMOS detector CMV20000. The main functions and characteristics of CMV20000 detector chip are introduced, and the driving of detector control signal and the receiving of high speed LVDS serial image data are realized with the help of FPGA. Dynamic phase adjustment technique is used to correct the phase of 16channel LVDS high speed serial data, the synchronous receiving and high speed serial to parallel conversion of imaging data are realized. The received image is restructured and exported through the CameraLink port. Functional verification is done for the imaging system with the use of testing image, and imaging experiment is done with the actual scenery. The consequence of the experiment shows that the output frame of system is as high as 30 fps, and the SNR of image is about 35 dB, which satisfies the indicator demands of imaging quality.

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梁超,马天翔.基于FPGA的CMOS成像电路设计[J].国外电子测量技术,2016,35(4):71-76

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  • 在线发布日期: 2016-05-23
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