基于多周期同步测量的频率计设计
DOI:
CSTR:
作者:
作者单位:

火箭军工程大学 西安 710025

作者简介:

通讯作者:

中图分类号:

TM935.16

基金项目:


Design of frequency meter based on multiperiods synchronization measurement
Author:
Affiliation:

Rocket Force University of Engineering, Xi’an 710025, China

Fund Project:

  • 摘要
  • |
  • 图/表
  • |
  • 访问统计
  • |
  • 参考文献
  • |
  • 相似文献
  • |
  • 引证文献
  • |
  • 资源附件
  • |
  • 文章评论
    摘要:

    针对工程实践中发现的频率计存在1字节误差以及待测信号幅度过大的问题。基于多周期同步测量计数理论,提出了一种以C8051F020与FPGA为最小系统的频率计制作方案,实现对待测信号频率及脉宽的精确测量。系统主要包括3部分:信号整形部分、频率计算部分、液晶显示部分。待测信号经过信号处理后和标准信号一同输入FPGA内部,单片机协同FPGA对信号进行频率测量并读取测频数据,然后将读取到的数据经过运算处理后显示。经实验验证,该系统测频范围可达0.1 Hz~10 MHz,有效消除了1个字节的误差且具有一定的抗干扰能力。

    Abstract:

    According to the engineering practice, the problem of 1 bytes error of the frequency meter and lower amplitude of the signal are found. This paper presents a method of making a frequency meter with the minimum system of C8051F020 and FPGA based on the theory of multiperiods synchronization measurement, and realizes the measurement of frequency and pulse width of the measured signal. The system mainly consists of the signal shaping module, the frequency calculation module, the LCD module. After amplification and rectification, the signal to be measured and the standard signal are input into FPGA. Two signals are counted in FPGA, and MCU calculates and processes the receiving data. Finally, the result of measurement is shown in the LCD. The test show that the system can measure the frequency up to 0.1 Hz~10 MHz, effectively eliminate the error of 1 byte and certain anti interference ability.

    参考文献
    相似文献
    引证文献
引用本文

许可行,刘延飞,羊帆.基于多周期同步测量的频率计设计[J].国外电子测量技术,2016,35(9):76-80

复制
分享
文章指标
  • 点击次数:
  • 下载次数:
  • HTML阅读次数:
  • 引用次数:
历史
  • 收稿日期:
  • 最后修改日期:
  • 录用日期:
  • 在线发布日期: 2016-10-20
  • 出版日期:
文章二维码
×
《国外电子测量技术》
财务封账不开票通知