Abstract:Aiming at the problems of slow speed and low resolution of dynamic video data in current video splicing technology,a system that can splice dynamic video data input from two cameras and two high definition multimedia interface(HDMI)is designed.The system is based on the Pango logos series field programmable gate array(FPGA)as the core,which is controlled by clock,register configuration,data acquisition,first in first out(FIFO)data storage control,the third generation of double-data-rate 3 synchronous dynamic RAM(DDR3 SDRAM)and other logical function modules.The read-write control,image scaling algorithm and video splicing algorithm of DDR3 IP core are designed and implemented.The Inserter and Debugger are used to conduct simulation tests on the main function modules,and the video acquisition experiment is carried out on the system.The results show that the system can complete the four-channel dynamic video splicing display.The resolution is 1920×1080,the refresh rate is 60 frames per second,and the look up table(LUT)resource is 18%.The system supports a variety of dynamic data input methods,has the characteristics of good portability,high frame rate resolution,low on-chip resource occupancy,and can be applied to dynamic video Mosaic application scenarios.